This invention relates to high voltage semiconductor devices, particularly but not exclusively power transistors of the insulated-gate field-effect type or of the bipolar type.
High voltage semiconductor devices are known having, at a major surface of a semiconductor body, polygonal regions of one conductivity type regularly arranged as a two-dimensional array in a higher resistivity body portion of the opposite conductivity type. Each of the polygonal regions forms with the body portion a p-n junction which is reverse-biased in at least a high voltage mode of operation of the device. Such devices may be designed to handle high voltages in excess of, for example, 100 volts and often very much higher. In the case of a bipolar transistor, the body portion may form part of the collector, the polygonal regions may form the base, and an emitter region of said opposite conductivity type may be provided in the polygonal base regions. In the case of a field-effect transistor (FET) of the so-called "D-MOS" type, the body portion may form a drain drift region, and a source region of the opposite conductivity type may be provided in the polygonal regions at the surface of which a channel is induced in operation between the source region and the drain drift region by a voltage applied to an overlying gate. It is also possible to merge FETs and bipolar transistors in the same device structure.
It has already been proposed to include further regions of the one conductivity type in intermediate parts of the body portion between the polygonal regions so as to improve the electrical field distribution which occurs in the body portion, between facing corners of the polygonal regions. Such a proposal is described at length in U.S. Pat. No. 4,642,674. The whole contents of this copending patent application are hereby incorporated by reference in the present application. According to the teaching in this copending patent application, the field distribution is improved by providing a further region of the one conductivity type in each area of the intermediate parts which is located between facing corners of three or more of the polygonal regions. It is considered that in this arrangement an acceptable compromise is obtained between the series resistance in the intermediate parts of the body portion and the breakdown voltage which is dependant on the electrical field distribution. A high voltage device having a similar further region between six triangular power MOSFET regions in a two-dimensional array is shown in the paper entitled "3D Numerical Analysis of Power MOSTs" by the present inventor et al in Proc. NASECODE II, Galway, June 1983, pages 102 to 106. Analysis by the present inventor indicates that the high electric field distribution at the corners of the polygonal regions is reduced by increasing the area occupied by the further region in the intermediate parts of the body portion but that this increases the series resistance by obstructing the current path in these intermediate parts. Furthermore in power D-MOS transistors having this construction the high fields can not only reduce the breakdown voltage but more importantly can reduce the punch-through voltage of D-MOS transistors having low threshold voltages. This punch-through occurs between the drain drift region and the source region.